Palo Alto, United States
Emulation & FPGA Prototyping Engineer
Voltai · Palo Alto · United States
Posted: 10/19/2026 · Last checked: 10/21/2026
Job description
Quoted in full from Voltai's job posting. Gavroche does not edit it.
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
About this Role
You'll bring designs to life before silicon exists. You'll own emulation and FPGA prototyping on real silicon programs with leading semiconductor companies while helping Voltai's AI learn to debug at system scale.
What You’ll Do
Build and maintain emulation and FPGA prototyping platforms for SoCs and subsystems.
Map designs onto emulators and FPGAs, including partitioning and timing closure.
Enable early software bring-up, system validation, and performance analysis.
Debug complex hardware/software issues at system scale.
Build automation for emulation compile, run, and triage.
Generate system-level data that helps train and evaluate Voltai's models.
What We’re Looking For
5+ years of emulation or FPGA prototyping experience.
Hands-on experience with Palladium, ZeBu, Veloce, or HAPS.
Strong SystemVerilog and FPGA tooling (Vivado, Quartus) experience.
Experience with hardware/software co-verification and debug.
Python, Tcl, or C/C++ scripting.
Bonus Points
Experience with transactors and hybrid emulation.
Linux driver or firmware bring-up experience.
Interest in AI-assisted design tools.
New openings in Palo Alto, by week
- 7/27/2026 13
- 8/3/2026 33
- 8/10/2026 22
- 8/17/2026 21
- 8/24/2026 30
- 8/31/2026 27
- 9/7/2026 23
- 9/14/2026 29
- 9/21/2026 42
- 9/28/2026 51
- 10/5/2026 42
- 10/12/2026 49
- 10/19/2026 43
425 openings over 12 weeks, by the week they were published.
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29 open.