Bengaluru, India
Analog circuit design engineer
Weekday AI ยท Bengaluru ยท India
Posted: 14/10/2026 ยท Last checked: 15/10/2026
Job description
Quoted in full from Weekday AI's job posting. Gavroche does not edit it.
๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐
๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ญ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ฏ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ญ๐ฑ-๐ฏ๐ฑ ๐๐ฃ๐)
Experience: 3+ yrs
Location: Bengaluru, Karnataka, India, Hyderabad, Telangana, India
We are looking for a skilled Analog Circuit Design Engineer with hands-on experience in analog and mixed-signal integrated circuit design. The ideal candidate will have strong technical expertise in Phase-Locked Loops (PLL), SerDes, FinFET technologies, and physical verification processes, including Layout Versus Schematic (LVS) and Design Rule Checks (DRC).
This role involves designing, analysing, verifying, and optimising high-performance circuits for advanced semiconductor applications. You will collaborate with cross-functional engineering teams to develop robust, power-efficient, and high-speed circuit solutions while ensuring design accuracy, reliability, and compliance with technology-specific requirements.
Requirements
Key Responsibilities
- Design, analyse, and optimise analog and mixed-signal circuits for advanced semiconductor applications.
- Develop and verify PLL circuits, focusing on frequency generation, clocking performance, stability, and jitter characteristics.
- Contribute to SerDes circuit design for high-speed data transmission and signal integrity.
- Perform transistor-level circuit simulations and analyse performance across process, voltage, and temperature (PVT) variations.
- Work with FinFET technology and understand its impact on circuit behaviour, power consumption, and performance.
- Collaborate with layout engineers to ensure accurate implementation of circuit designs.
- Perform and debug LVS and DRC checks, resolving schematic-to-layout mismatches and design rule violations.
- Support post-layout simulation, parasitic analysis, and circuit performance optimisation.
- Investigate circuit functionality, timing, noise, power, and reliability issues.
- Participate in design reviews and collaborate with cross-functional engineering teams.
- Maintain design documentation, simulation results, verification reports, and technical specifications.
- Follow established semiconductor design methodologies, verification standards, and quality practices.
What Makes You a Great Fit
- 3+ years of experience in analog or mixed-signal integrated circuit design.
- Strong understanding of analog circuit fundamentals, transistor-level design, and semiconductor device characteristics.
- Hands-on experience with PLL design and/or SerDes circuit development.
- Knowledge of FinFET process technologies and advanced-node semiconductor design considerations.
- Practical experience with LVS, DRC, and physical verification workflows.
- Familiarity with circuit simulation tools such as Cadence Virtuoso, Spectre, or HSPICE.
- Understanding of PVT analysis, post-layout simulation, parasitic effects, and circuit optimisation.
- Strong debugging, analytical, and problem-solving skills.
- Ability to collaborate effectively with circuit design, layout, and verification teams.
- A Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI, or a related discipline is preferred.
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