← Back to all roles in the United States

San Jose, United States

RTL Design Engineer

Etched · San Jose · United States

$2,500 per monthFull timeChip Design / Verification Engineer

Posted: 6/11/2025 · Last checked: 10/18/2026

Job description

Quoted in full from Etched's job posting. Gavroche does not edit it.

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.

In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched’s success.

Representative projects

  • Implement a block to efficiently compute floating point math operators

  • Provide feedback to the uArch team to make sure blocks meet timing and area constraints

You may be a good fit if you

  • At least 5 years of work experience in RTL development.

  • Experience with high-speed digital logic.

  • Proficiency in standard RTL design and synthesis tools

  • Familiarity with verification work and writing test benches

  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

  • Willing to start quickly

Strong candidates may also have experience with (Nice-to-have qualifications)

  • Experience with PCIe, Ethernet, or HBM technologies

  • Familiarity with modern ML and LLM model architectures.

  • Familiarity with numerical representations and functions

  • ​Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2.5k per month for those living within walking distance of the office

  • Relocation support for those moving to San Jose (Santana Row)

  • Various wellness benefits covering fitness, mental health, and more

  • Daily lunch + dinner in our office

  • Unlimited compute budget subject to ROI justification

How we’re different:

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.

 

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Similar roles in San Jose

59 open roles like this one; at most three per employer shown.

What chip design / verification engineer adverts in the United States state

Middle half: 150,375 – 215,625 USD a year; median 172,500 USD.

From 42 adverts by 17 employers that state a salary, annualised.

New openings in San Jose, by week

  1. 7/20/2026 37
  2. 7/27/2026 52
  3. 8/3/2026 43
  4. 8/10/2026 30
  5. 8/17/2026 55
  6. 8/24/2026 48
  7. 8/31/2026 64
  8. 9/7/2026 48
  9. 9/14/2026 52
  10. 9/21/2026 51
  11. 9/28/2026 55
  12. 10/5/2026 87
  13. 10/12/2026 106

728 openings over 12 weeks, by the week they were published.

Other roles at Etched

120 open.