← Back to all roles in the United States

Chicago, United States

FPGA Engineer - Algo

DRW · Chicago · United States

$150,000–$250,000 per yearChip Design / Verification Engineer

Posted: 6/13/2025 · Last checked: 10/12/2026

Job description

Quoted in full from DRW's job posting. Gavroche does not edit it.

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk.

Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets.

We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus.

We are currently seeking a FPGA Engineer to join one of our trading teams. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design.

This role is for the Chicago office only.

Responsibilities: 

  • Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up
  • Research and evaluate a variety of cutting-edge FPGA hardware and technologies
  • Propose creative solutions to overcome FPGA/hardware limitations
  • Liaise directly with software and other design teams
  • Conduct lab debugging and characterization of new hardware

Candidate Requirements: 

  • Bachelor’s degree or higher, Computer/Electrical Engineering with 3+ years of experience within the field; (Master’s degree or higher also counts for experience)
  • Solid Hardware Engineering experience, especially with FPGA
  • Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production
  • Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation
  • Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog
  • Experience in FPGA design flow including synthesis, place & route , static timing analysis is required
  • Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required
  • Knowledge of the TCP/IP stack
  • Strong working knowledge of either XILINX or ALTERA FPGA design flow
  • Experience with functional verification utilizing high-level methodologies (e.g. System Verilog) is a plus.
  • Excellent research and data gathering skills

The annual base salary range for this position is $150,000 to $250,000 depending on the candidate’s experience, qualifications, and relevant skill set. The position is also eligible for an annual discretionary bonus. In addition, DRW offers a comprehensive suite of employee benefits including group medical, pharmacy, dental and vision insurance, 401k (with discretionary employer match), short and long-term disability, life and AD&D insurance, health savings accounts, and flexible spending accounts.

For more information about DRW's processing activities and our use of job applicants' data, please view our Privacy Notice at https://drw.com/privacy-notice.

California residents, please review the California Privacy Notice for information about certain legal rights at https://drw.com/california-privacy-notice.

#LI-BL1

Similar roles in Chicago

43 open roles like this one; at most three per employer shown.

What chip design / verification engineer adverts in the United States state

Middle half: 165,050 – 228,125 USD a year; median 175,788 USD.

From 30 adverts by 13 employers that state a salary, annualised.

New openings in Chicago, by week

  1. 7/20/2026 71
  2. 7/27/2026 58
  3. 8/3/2026 82
  4. 8/10/2026 69
  5. 8/17/2026 96
  6. 8/24/2026 163
  7. 8/31/2026 154
  8. 9/7/2026 128
  9. 9/14/2026 168
  10. 9/21/2026 185
  11. 9/28/2026 177
  12. 10/5/2026 228
  13. 10/12/2026 7

1,586 openings over 12 weeks, by the week they were published.

Other roles at DRW

96 open, including roles outside the United States.