Posted by the employer · Austin, United States
2027 Internship - Design Verification Engineer
Cirrus Logic · Austin · United States
Posted: 9/11/2026 · On the employer's job feed since 10/11/2026
The advert
Quoted in full from Cirrus Logic's job posting. Gavroche does not edit it.
We recruit interns year-round for Spring, Summer, and Fall 2027 opportunities. Each internship lasts 12–16 weeks and follows a full-time schedule.
Responsibilities
- Assist in verification planning and strategy development.
- Support testbench creation, maintenance, and enhancement.
- Contribute to failure analysis, debug, and resolution efforts.
- Help with coverage analysis and population to ensure thorough verification of mixed-signal products.
- Work on digital/mixed-signal modeling, directed and constraint-random test generation, and verification flow development.
Required Skills and Qualifications
- Currently pursuing a MS or PhD in Electrical Engineering or a related field.
- Strong background in Hardware Description Languages (HDLs) such as Verilog or VHDL.
- Familiarity with Hardware Verification Languages (HVLs) like SystemVerilog/UVM, Vera, or e.
- Solid understanding of digital design fundamentals and verification methodologies.
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