Scientific Software Engineer

About the Mission

Every chip Alice & Bob builds starts as Python code. As we scale from tens of qubits to thousands, our chip-design software becomes the backbone of the entire design pipeline, and it has to support chips that could never be drawn by hand.

About the Role

As a Scientific Software Engineer in the Design and Implementation team, you’ll own the internal framework our engineers use to turn a quantum circuit into a layout and send it to electromagnetic and circuit simulators. You’ll keep it robust and fast, grow its component library, and build the automation our layout and scale-up engineers need to design large chips.

Responsibilities

Own and maintain the internal design backend API and qubit design framework: code quality, testing, CI, releases, documentation
Develop new parametric components and layout primitives with the chip designers who use them
Extend and harden the export pipeline to electromagnetic and circuit simulation tools
Build the automation layer for large-scale, hierarchical chip layouts in close partnership with our physical-design and scale-up engineers
Support internal users: onboarding, debugging, API design, and turning recurring pain points into features

Requirements

5+ years of professional Python development, with strong software engineering fundamentals: testing, packaging, versioning, CI/CD, code review
Solid experience building and maintaining a library or framework used by other engineers, and a taste for clean, well-documented APIs
Comfort with computational geometry or CAD/layout data (GDSII, polygons, transformations) — or eagerness to learn it fast
Ability to work closely with hardware engineers and translate their needs into software
Fluent English and excellent written and verbal communication skills


Nice to have:
Experience with gdstk, gdsfactory, KLayout, or other layout tooling
Familiarity with electromagnetic simulation tools (HFSS/AEDT, Palace) or circuit simulators
Background in superconducting circuits, RF/microwave engineering, or semiconductor design automation (EDA)

Recruitment Process

Screening Call with Grace, Talent Acquisition Specialist (30 min)
Hiring Manager Interview with Felix (45 min)
Technical Interview/Presentation with the Team (120 min)
Leadership Team Interview (30 min)
Fit Interview (45 min)
Reference check